The world map of AI compute: who makes what, where it flows, and where verification can grab hold — with a look inside the chip itself.
Where an actor sits constrains both what it can observe and what leverage an agreement can apply. Use the map to find the stages where production is concentrated in a few jurisdictions, then compare those chokepoints with the more diffuse parts of the chain where activity becomes harder to see.
A geographic chokepoint is potential leverage, not verification by itself. It matters only when some authority can require a declaration, obtain a record, inspect a facility, or impose a technical control there. Carry that distinction into 1.2.2, which turns positions on the supply chain into evidence relationships: who can show a verifier something about whom.
Notes and Sources
The stage-by-stage structure comes from CSET’s “The Semiconductor Supply Chain” (2021), including its account of assembly and test as the part of the chain with the lowest barriers to entry. The concentration figures come from Sastry, Heim, Belfield et al., “Computing Power and the Governance of Artificial Intelligence” (2024): ASML at 100% of EUV lithography, TSMC at roughly 90% of sub-7 nm logic in the cited 2022 data, and several critical steps with fewer than three suppliers. High-bandwidth memory entered the US export-control perimeter in 2024; Fist, Burga and Chilukuri describe that expansion in “Technology to Secure the AI Chip Supply Chain” (CNAS, 2024).
Currency. The concentration figures above use 2021–2023 data reported in 2021 and 2024 sources. Shares move; the structure — one EUV maker, one dominant leading-edge fab and a handful of clouds — has not. Re-verify a number before quoting it. The policy layer moves faster still: re-check dates, thresholds and bill status before citing. Later modules go deeper on the mechanisms named here.